CVE-2023-34326

The caching invalidation guidelines from the AMD-Vi specification (48882—Rev 3.07-PUB—Oct 2022) is incorrect on some hardware, as devices will malfunction (see stale DMA mappings) if some fields of the DTE are updated but the IOMMU TLB is not flushed. Such stale DMA mappings can point to memory ranges not owned by the guest, thus allowing access to unindented memory regions.
Configurations

Configuration 1 (hide)

cpe:2.3:o:xen:xen:*:*:*:*:*:*:*:*

History

11 Jan 2024, 15:57

Type Values Removed Values Added
First Time Xen
Xen xen
CWE NVD-CWE-noinfo
CPE cpe:2.3:o:xen:xen:*:*:*:*:*:*:*:*
CVSS v2 : unknown
v3 : unknown
v2 : unknown
v3 : 7.8
References () https://xenbits.xenproject.org/xsa/advisory-442.html - () https://xenbits.xenproject.org/xsa/advisory-442.html - Vendor Advisory

05 Jan 2024, 18:23

Type Values Removed Values Added
New CVE

Information

Published : 2024-01-05 17:15

Updated : 2025-06-18 16:15


NVD link : CVE-2023-34326

Mitre link : CVE-2023-34326


JSON object : View

Products Affected

xen

  • xen